The operation of the SN75500A on the horizontal or vertical electrodes is primarily dependent on the panel’s application. The outputs of the SN75500A are normally low and switch high selectively when the strobe input is low. The SN75500A thus provides the positive select pulses. The logic symbol, functional block diagram, and output structure of the SN75500A is shown in Figure 8-38. Selection of the outputs (32) is accomplished with the select and data inputs. The 32 outputs of the SN75500A are divided into four sections (lQX, 2QX, 3QX, 4QX) of eight outputs each. Only one of the four sections can be activated at one time (eight outputs). All other outputs (24) remain low. For this reason most systems use the SN75500A to scan the electrodes along which the information is written.
Selection of the specific section is determined by the select inputs S0 and S1 (Table 8-1). When selected, the state of the eight outputs of the section is determined by the data stored in the 8-bit storage register. Data is shifted into the storage register in a serial fashion on the positive transition of the clock. The maximum guaranteed data rate is 4 MHz. Data is shifted into the Q1 register and progresses to the 08 register. A logic zero previously entered in the serial data input stream determines which of the outputs will switch high when the SN75500A is strobed (pulsed low). All outputs of the SN75500A contain clamp diodes to the VCC2 and GND supply inputs. This allows it to be operated on a base waveform where required. These diodes play an important role as discussed in the following section on Functional Adaptation of the SN75500A and SN75501C. Push-pull circuitry on each output provides active switching between the GND and VCC2 supplies. All inputs of the SN75500A are CMOS compatible (VTH = 5 V) and assume a logical I if left open. A typical operating sequence is shown in Figure 8-39.