## Options for simulation profiles

Use the Options tab of the Simulation Settings dialog box to fine-tune how PSpice performs calculations for analog and gate-level digital simulation, as well as what information to save to the simulation output file (*.OUT).

#### Option categories

From the Category list, select Analog Simulation, Gate-level Simulation, or Output file to display the settings for each option category. Click the Reset button to reset all the options to their default values.

#### Analog simulation options

Use the Analog Simulation settings to fine-tune analog simulation accuracy, set iteration limits, set operating temperature, and specify MOSFET parameters.

The option names shown to the right of each text box correspond to the option names used in the PSpice .OPTIONS command. For more information about this command, refer to the online PSpice Reference Guide.

Click this button… | To do this… |

AutoConverge | Suggest relaxed limits for various options that PSpice can modify during a simulation to achieve convergence. |

MOSFET options | Enter values for the default drain area, default source area, default length, and default width. |

Advanced options | Enter values for the total transient iteration limit, relative magnitude for matrix pivot, and absolute magnitude for matrix pivot. |

The following tables defines all the options in the tab for the Analog Simulation category:

Flag option |
Meaning |

ADVCONV | Enables all convergence algorithms, such as Pseudo Tran,STEPGMIN, and step sources. ON by default. |

DMFACTOR | Sets the relative factor for minimum delta. The value specifies the relative value by which the minimum time step size is changed. The value should be less than or equal to 1 and a factor of 10, such as .1,.001, or .0001. |

GMINSRC | Enables step GMIN inside source-stepping |

NOGMINI | Specifies not to add GMIN across current sources. |

PSEUDOTRAN | Uses Pseudo-Transient Method. |

STEPGMIN | Enables GMIN stepping. This causes a GMIN stepping algorithm to be applied to circuits that fail to converge. GMIN stepping is applied first, and if that fails, the simulator falls back to supply stepping. |

BRKDEPSRC | Sets automatic break-points for behavioral sources. |

CONVAID | Generates .1OP file for debugging purpose when convergence fails. |

NOSTEPSRC | Do not run source stepping algorithm for bias point convergence. |

NOSTEPDEP | Do not step dependent sources during source stepping algorithm forbias point convergence. |

TRANCONV | Enables alternate path search if transient simulation fails. |

PREODER | Presorts the matrix diagonal by Markowitz counts. |

Options |
Description |
Units |
Default |

ABSTOL^{1} |
best accuracy of currents | amp | 1.0 pA |

CHGTOL | best accuracy of charges | coulomb | 0.01 pC |

GMIN ^{1} |
minimum conductance used for any branch | ohm^{-1} |
1.0E-12 |

GMINSTEPS | the GMIN stepping size in integer (anypositive value). Set to 0 for engine default. | Same as ITL1 | |

ITL1 | DC and bias point blind repeating limit (thefirst evaluation of the operating point of the system) | 150.0 | |

ITL2 | DC and bias point educated guess repeatinglimit (DC transfer curve iteration limit) | 20 | |

ITL4 ^{1} |
the limit at any repeating point in transientanalysis | 10 | |

ITL52 | total repeating limit for all points for transientanalysis (ITL5=0 means ITL5=infinity) |
0.0 | |

ITL6 | the number of steps of the source steppingalgorithm. Can have any positive integer value. Set to 0 for engine default. | Same as ITL1 | |

LIMIT | the absolute voltage limit. | 1.0E-12 | |

method | integration method (values can be either TRAPEZOIDAL or GEAR) |
||

NUMDGT | number of digits output in print tables (maximum of 8 useful digits) |
4.0 | |

PIVREL ^{2} |
relative magnitude required for pivot in matrixsolution | 1.0E-3 | |

PIVTOL ^{2} |
absolute magnitude required for pivot in matrix solution | 1.0E-13 | |

PTRANSTEP | number of steps for a pseudo transientanalysis to find the operating point. Can be any positive integer value. Set to 0 for engine default. | Same as ITL1 | |

RELTOL ^{1} |
relative accuracy of V and I | 0.001 | |

SOLVER ^{2} |
performance package solution algorithm |

(Solver = 0 selects the original solutionalgorithm;

Solver = 1 selects the advanced solutionalgorithm) 1THREADSmaximum number of threads. Set to 0 forengine default. THREADS=1 implies single-thread. Number ofcores/2TRTOLtolerance for integration error calculated usingtransient analysis. It is a relative tolerance where a higher TRTOL value results in bigger time steps and reduced accuracy. The TRTOL value should NOT be greater than 1/RELTOL. 7VNTOL ^{1}best accuracy of voltagesvolt1.0 uVWCDEVIATIONworst case deviation. It can have doublevalues between 0 and 1. Same as RELTOLCSHUNTshunt capacitance added from all nodes of the design to GND. Recommended value is 1pF.farad0DIODERSMinimum value for Diode ohmic resistanceohm0DIODECJOMinimum value for Diode junction capacitancefarad0BJTCJMinimum value for BJT Base-collector zero-bias depletion capacitance (Cjc) and Base-emitter zero-bias depletion capacitance (Cje)farad0TNOMNominal Temperature valueCelsius27 degreesCelsius

1 | These options can have an expression that uses the SCHEDULE function, which is a function of time. |

2 | PSpice now contains two solution algorithms for simulation. Solver 1 increases simulation speed over Solver 0, particularly for larger circuits with substantial runtimes. Solver 1 has slightly better convergence characteristics than Solver 0. Having both algorithms available improves convergence, since there are two different algorithms that can perform the simulation. |

#### Gate-level simulation options

Use the Gate-level Simulation settings to set timing, I/O levels for interfaces, drive strength, and error message limits.

Click this button… | To do this… |

Advanced options | Enter values for the minimum output drive resistance, maximum output drive resistance, overdrive ratio, default delay calculation, and error message limits. |

The option names shown to the right of each text box correspond to the option names used in the PSpice .OPTIONS command. For more information about this command, refer to the online PSpice Reference Guide.

#### Output file options

Use the Output File settings to select the types of information PSpice saves to the simulation output file.

The option names shown to the right of each text box correspond to the option names used in the PSpice .OPTIONS command. For more information about this command, refer to the online PSpice Reference Guide.

The following tables defines all the options in the tab for the Output file category:

Flag option |
Meaning |

ACCT | Summary and accounting information is printed at the end of all theanalyses (refer to your PSpice User’s Guide for further information on ACCT). |

EXPAND | Lists devices created by subcircuit expansion and lists contents of thebias point file. |

LIBRARY | Lists lines used from library files. |

LIST | Lists a summary of the circuit elements (devices). |

NOBIAS | Suppresses the printing of the bias point node voltages. |

NODE | Lists a summary of the connections (node table). |

NOECHO | Suppresses a listing of the input file(s). |

NOMOD | Suppresses listing of model parameters and temperature updatedvalues. |

NOOUTMSG | Suppresses simulation error messages in output file. |

NOPAGE | Suppresses paging and the banner for each major section of output. |

OPTS | Lists values for all options. |

NUMDG | Number of digits in printed values. This is 4 by default. |

Collected from PSpice A/D simulation help center… Any contact please use: [email protected]