The rise time of the input signal is a critical parameter in comparator applications. The comparator is basically a differential amplifier with very high open-loop gain. The output is compatible in voltage and current with the inputs of TTL circuits. However, this type of logic requires switching times of less than 150 ns to function correctly without going into oscillation. The comparator input signal must vary rapidly enough to avoid this problem
Figure 2-40(a) shows the output of a TL710 being driven by a ramp voltage which varies at approximately 0.1 mV/us. The switching times of the output, taken between 0.8 V and 2 V, are approximately 10 us for the fall and rise times. In this mode, the output of the comparator is not compatible with TTL circuits.
Figure 2-40(b) shows a TL810 under the same conditions as described for the TL710. With a higher gain than the TL710, the switching speed for the TL810 is also higher.
and the rise time is compatible with TTL circuits. However, some oscillation is present during the periods of switching. This occurs because the input signal remains in the high-gain linear range of the comparator for an excessive period of time. For the output of a comparator to be good, the input must force the output to vary between 0.8 V and 2 V in 150 ns or less.
When the minimum gain (AVD) of the comparator is known, the input signal must vary at a minimum rate determined by the following equation:
For the TL710, the minimum rate is determined as follows:
When these input conditions are not being met, some positive feedback must be added or a Schmitt trigger configuration must be designed (see Figure 2-41) to accelerate the switching speed. However, the resulting hysteresis makes the comparator less voltage sensitive.